| clockConfiguration | The internal hardware parameters associated with a given CPU clock speed |
| FacePrinter | A FacePrinter is capable of performing low-level printing operations to some assigned (physical or 'virtual') face |
| fioparms | An AVRDUDE struct describing the ways in which a file may be opened |
| GPIOInterruptHandlerInfo | Information about an external interrupt handler attached to a GPIO pin |
| GRL | A GRL is a "General Reflex Locator" |
| ihexrec | The description of a single line of an Intel "ihex" format "hex file" |
| PacketHeader | The information associated with a packet, when it is stored in memory only -- there is no preestablished packet header on the wire |
| PacketPrinterHeader | Stores the information needed to use a virtual face to print a packet into a user-supplied buffer |
| PinInfo_s | A description of a single SFB-programmer-visible hardware pin |
| Programmer | A structure holding state associated with a program we may burn or are in the process of burning |
| PWMInfo | The per-PWM-capable SFB pin information needed to configure PWM on that pin |
| SDRaw | A class to control an SD Card |
| SDRawDiskInfo | Information associated with an SD Card |
| SFB_CONFIG_MEM_T | The data stored in flash configuration memory by the SFB _secondary_ bootloader |
| SFBAlarm | Manage "alarm clock"-style settable timers |
| SFBBootBlock | The exactly-64-byte-long SFB 'boot block' contents |
| SFBBrainReflex | A 'convenience class' (with a prebuilt instance Brain) which provides a means of declaring reflexes that trigger at the "brain" -- i.e., after the individual faces and the Spine |
| SFBByteBuffer | Base class providing services common to SFBRxByteBuffer and SFBTxByteBuffer |
| SFBDispatchEntry | An SFBDispatchEntry describes an SFB reflex |
| SFBEeprom | Wrapper class implementing the EEPROM object for access to the EEPROM |
| SFBFrame | Handles packet framing and deframing |
| SFBGRLMasterTable | The description of all the known arrays-of-PacketHandler's 'reflex tables' |
| SFBHeap | A minimal heap memory allocator, based on the ancient K&R approach |
| SFBHWHostRegister | An incomplete cut at host-side simulation of the SFB hardware registers |
| SFBHWI2C | Provide access to the I2C bus hardware on the IXM |
| SFBHWSerial | The object supporting 'hardware level' serial operations on the SFB |
| SFBHWTimer | The representation of a hardware timer |
| SFBMemory | A class for temporarily storing packets, and then retriggering on them at a later time |
| SFBNet | Class supporting 'service gradient routing' via the Net |
| SFBProcessor | Wrapper class implementing the Processor object for access to CPU speed control |
| SFBProfile | A profiling system providing millisecond resolution for over a month's worth of runtime |
| SFBProvenance | An SFBProvenance provides information that describes a sketch as a physical artifact |
| SFBQLED | A simple queuing system to allow displaying various 'blink patterns' on the SFB built-in LEDs without having to block |
| SFBReactor | The SFBReactor manages the SFB reflex triggering system: It determines how an SFB will react to any given packet type |
| SFBRxByteBuffer | A specialized SFBByteBuffer that handles asynchronous data reception, i.e., data is added to the buffer at interrupt level (IL), and removed from the buffer in the background process (BG) |
| SFBSerial | A serial communications "endpoint", implementing the SFB packet protocol, including baud rate negotiation (BRN) |
| SFBSpineReflex | A 'convenience class' (with a prebuilt instance Spine) which provides a means of declaring reflexes that trigger at the "spine" -- i.e., after the individual faces, but before the Brain |
| SFBTicker | The short-term, high-resolution profiling information maintained by the core |
| SFBTxByteBuffer | A specialized SFBByteBuffer that handles asynchronous data transmission, i.e., data is added to the buffer in the background process (BG), and removed from the buffer at interrupt level (IL) |
| UartDescriptor | UART (hardware serial port) configuration information |